Commodore 500, a.k.a. PET II schematic diagrams | |
../ | [Parent directory] |
drives@ | Disk drives |
firmware@ | System firmware |
Date | Size | Filename | Description | |
---|---|---|---|---|
1998-09-28 | 346636 | 4256041-01of15.gif | Commodore 500 �P, address & data buffers, arbitration logic | |
1998-09-27 | 264513 | 4256041-02of15.gif | system decode & buffer control | |
1998-09-28 | 292293 | 4256041-03of15.gif | VIC; video memory; video bus buffers | |
1998-09-27 | 192900 | 4256041-04of15.gif | SID; 192k DRAM array refresh logic | |
1998-09-28 | 279736 | 4256041-05of15.gif | 192k DRAM address mux & control | |
1998-09-27 | 238991 | 4256041-06of15.gif | 192k*8 DRAM array [64k standard, 128k optional] | |
1998-09-28 | 223503 | 4256041-07of15.gif | 64k DRAM array and address mux | |
1998-09-28 | 194905 | 4256041-08of15.gif | system ROM/RAM array | |
1998-09-28 | 273583 | 4256041-09of15.gif | gameport interface; keyboard interface; RS232C interface | |
1998-09-27 | 295118 | 4256041-10of15.gif | interrupt prioritization; IEEE488 interface; user/game port interface | |
1998-09-28 | 258517 | 4256041-11of15.gif | cassette i/f port | |
1998-09-27 | 193891 | 4256041-12of15.gif | main oscillators & PLL | |
1998-09-28 | 150690 | 4256041-13of15.gif | video output circuit | |
1998-09-27 | 289443 | 4256041-14of15.gif | [List of power filter capacitors for each IC] | |
1998-09-28 | 211721 | 4256041-15of15.gif | [FPLA logic equations] | |
1998-10-20 | 920 | README | Information about the Commodore 500 a.k.a. PET II. | |
1999-07-30 | 3512 | keyboard.txt | Commodore P500 Keyboard Schematic. Composed by Tony Duell <[email protected]>. |
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